I've written previously about the DAC board, but mainly looking at it as a black box. This time it's time to look at the inner workings.
We perform two tests on the DAC, noise measurements and linearity. The complete range of the DAC is actually covered by five small DACs inside the package, which have a 7-bit range. Although normally we just control the main DAC and let the FPGA/DAC combo figure out what happens next, when the noise and/or linearity tests don't measure up to expectations, we need to look further.
That's why there's a special override register that can be enabled (set to 1) which allows us to control the five small DACs directly. This is done through two 32-bit registers, in a kind of funny way:
First register, called testd1, holds bits 19 to 0 in the table below. Register testd2 holds bits 34 to 20. The highest bit is the most significant bit (MSB).
bit | meaning |
34 | Bit 7 (MSB), DAC 1 |
33 | Bit 7 (MSB), DAC 2 |
32 | Bit 7 (MSB), DAC 3 |
31 | Bit 7 (MSB), DAC 4 |
30 | Bit 7 (MSB), DAC 5 |
29 | Bit 6, DAC 1 |
28 | Bit 6, DAC 2 |
27 | Bit 6, DAC 3 |
26 | Bit 6, DAC 4 |
25 | Bit 6, DAC 5 |
24 | Bit 5, DAC 1 |
23 | Bit 5, DAC 2 |
22 | Bit 5, DAC 3 |
21 | Bit 5, DAC 4 |
20 | Bit 5, DAC 5 |
... | ... |
... | ... |
1 | Bit 1 (LSB), DAC 4 |
0 | Bit 1 (LSB), DAC 5 |
Et cetera. Note the interleaving of bits. Since testers use scripts for this, we need to create a simple function which makes it easy to control the DACs separately.
In the end, I created a function which does the following: